In the computer networking industry, datagrams originate from application layers and traverse down to different layers of software on a host computer, finally entering the data link layer and then the physical layer. For each type of physical layer, there are multiple data link layer formats that can be attached to the datagram. The same datagram can traverse different physical layers with different datalink layer headers, but at each node where the datagram crosses such a boundary, the ingress datalink layer has to be stripped and a new data link layer, for the next network, has to be inserted.
At the advent of networking in the 1960's, wire speeds were of the order of 300 bits/Sec to 56 k bits/Sec. As data packets traverse at these speeds across different networking nodes, changing datagram headers from one native interface to a different native interference was not much of a load on the system; in fact, it was done mostly in processors. In todays networking, however, environment speeds are ever increasing, and the requirement to process datagram headers at high speed has become a bottleneck in effective usage of high speed physical network links.
Networking nodes examine datagrams from an interface in the language of that interface (data link and network link layer headers), and then determine the destination interface on the networking node. If the destination interface has a different language (data link layer and network layer headers), then a translation is required from the ingress language to the egress language. Such translation of headers, i.e. header manipulation or adaptation, is done many ways in traditional networking nodes, with the criteria chosen to do this translation being based on the speeds of the interface. If the speed of such interface is relatively lower than the processor instruction speed on the networking node, then the designers usually use the processors to effect the necessary translation. In recent years, however, with the advent of optical fiber transmission, the speeds are reaching astronomical numbers, anywhere from 100 Mbits/second (10.sup.8 bits per second) to 10 Gbits/second (10.sup.10 bits per second). At those rates, a packet header (usually 20 bytes) takes about 1.6 uSec (100 Mbits/Sec) to about 16 nSec (at 10 Gbits/Sec). At such rates, current processors running, for example, with the order of about 200 MHz clocks cannot keep up with very high data rates. This lack of performance by the processors has forced the optical physical layers to have substantial and undesirable dead time.
Designers of current networking nodes have accordingly started to try to accomplish this function of header translation or manipulation or change, in hardware without the use of processors. While the advent of ASIC has helped the cause tremendously, even ASICs only run clocks internally comparable to the byte stream, and thus still face challenges in processing the headers.
The invention herein relates to datagram header processing and hardware with the aid of novel procedures and algorithms that allow the conversion of datalink layers and network layer headers from one interface of a networking device to another interface at speeds that are scalable to extremely high speeds; i.e. scalable so that as the physical link speed increases, the technique allows for scaling to those high speeds. The invention accomplishes this processing of the datagram headers for high speed interfacing uses at relatively very low clock speeds, thereby leveraging the power to process headers at low speed to maintain data rates at high speed.